CompSOC aims to reduce system complexity through two techniques
composability: each application can be developed, verified, and executed in isolation.
The complete absence of any interference (timing, energy/power, value domains) between applications allows different applications to be designed and verified independently. Integration of multiple applications on the same platform, and switching them on and off at run time is guaranteed to not impact other applications in any way. To implement composability we offer a virtual execution platform to each application, in which it can perform its own task scheduling and power management. Different applications can use different models of computation (dataflow, Kahn process networks, and so on), since they are isolated in their own virtual platforms
- predictability: real-time applications can be implemented in CompSOC since each virtual platform has well-defined timing properties. In fact, if cyclo-static dataflow (CSDF) is used, the SDF3 tools provide automated mapping to the CompSOC platform, which includes: binding tasks to processors, local state to local memories, communication channels to network-on-chip (NOC) connections and local and remote memories, computing scheduling settings for RTOS, NOC, memory controllers, etc.
The CompSOC platform consists of
- the Aethereal / aelite / daelite network on chip
- multiple microBlaze tiles with local memories and DMAs
- the microBlazes optionally run the CompOSe real-time operating system (RTOS)
- the Predator real-time DRAM memory scheduler and controller
CompSOC platforms are prototyped on Xilinx FPGA boards, and (partially) in SystemC.
An advanced tool chain provides automated generation of
- application-specific networks on chip (RTL VHDL, SystemC, C drivers)
- application-specific arbitration for shared memories (SystemC, C drivers)
- CompSOC hardware instances (multiple microBlaze tiles, NOC, multiple shared memories)
automated mapping of cyclo-static dataflow applications (CSDF) on the CompSOC platform.
The open-source SDF3 tools are used for this.
- automated DRAM power estimation (open-source DRAMPower)